The European Information and Communications Industry Association (EICTA), which was rebranded DIGITALEUROPE in March of 2009 was formed from a consolidation of the European Telecommunications and Professional Electronics Industry (ECTEL) and the European Association of Manufacturers of Business Machines and Information Technology (EUROBIT). This disclosure refers to standards enacted by ECTEL. The ECTEL standards include talk time and standby time for Global System for Mobile Communications (GSM) mobile terminals. GSM mobile terminals operating in the 900 MHz band have defined power levels. FIG. 1 is a table showing GSM power level (PWL) numbers with corresponding power output levels delivered to a GSM mobile terminal's antenna.
ECTEL talk time is measured at power level 7 (PWL 7) which is defined as 29 dBm of output power delivered to a mobile terminal's antenna. However, due to a typical antenna trace loss of 0.3 dBm, the output power of a PA is preferably increased to 29.3 dBm. In another example, a GSM mobile terminal operating in the extended E-GSM-900 band that spans 880-915 MHz within the European Union (EU) includes a low band (LB) power amplifier (PA) that needs to provide at least 32.5 dBm of output power at the mobile terminal's antenna. However, the PA is typically designed for 34.2 dBm because of an antenna trace loss and a preferred production margin. Power losses such as the antenna trace loss affect a figure of merit for PAs known as power added efficiency (PAE). A relatively low PAE reduces talk time for a mobile terminal.
As such, a goal of an optimal PAE for typical power levels should be focused on PA output circuitry design.
The relationship between power added efficiency (PAE), output power (Po) and maximum output power (PMAX) can roughly be calculated as:
      P    ⁢                  ⁢    A    ⁢                  ⁢          E      ⁡              (                  P          o                )              =      P    ⁢                  ⁢    A    ⁢                  ⁢                  E                  P          MAX                    ·                                                  P              O                                      P              MAX                                      .            
FIG. 2 illustrates the relationship between PAE and Po. Typically, a PA design specification requires the PA to be able to deliver PMAX. Yet, the PA is most often operated at a lower power than PMAX. As a result, PAE is reduced to undesirable percentages when the PA is operated at lower levels such as PWL 7, 8, etc.
As shown in FIG. 2, a PA achieving 45% PAE when operated at 34 dBm will only achieve a PAE of around 26% when the PA is operated at 29 dBm.
FIG. 3 is a schematic diagram of a prior art mobile terminal output stage 10 that includes a PA 12 with a load switch 14 for switching in and out impedance elements of an impedance matching network 16 that is coupled to PA 12. The impedance matching network 16 is selectively in communication with an antenna 18 through a transmit and receive (T/R) switch 20 and a filter 22. The prior art load switch and impedance matching network of FIG. 3 is commonly used to improve PAE when the PA 12 is operated at lower power levels than PMAX. A goal of the load switch concept illustrated in FIG. 3 is to design an output impedance matching network that includes two impedance matching states. A first impedance matching state is for PWL 5 and PWL 6, in which the PA 12 may provide a maximum power of 34.2 dBm. A second impedance matching state is for PWL 7 as well as lower power levels and provides a lower output power, but yields an improved PAE.
FIG. 4 depicts the improvement in PAE by activation of the load switch 14. When the load switch 14 is deactivated, the PA 12 may deliver power at the PWL 5 and PWL 6 power levels through the impedance matching network 16 at the first impedance matching state. Conversely, when the load switch 16 is activated, the PA 12 may deliver power at the PWL 7 power level and below through the impedance matching network 16 at the second impedance matching state. As shown in FIG. 4, activating the load switch 14 improves the PAE of the PA 12 from about 26% to about 40% for PWL 7. Consequently, the talk time of a mobile terminal incorporating the load switch 14 and impedance matching network 16 is significantly increased for PWL 7 and below.
A traditional design of a load switch circuit comes from classical power amplifier textbook theory, which is briefly described below. FIG. 5 is a schematic diagram of a typical load switch circuit having PA with a transistor 24 and output impedance matching network 26 that was designed in accordance with the classical power amplifier textbook theory. The task of designing the output impedance matching network 26 is primarily to convert an antenna impedance (Zant) to a lower impedance level at the collector of the transistor 24. The lower impedance level (ROpt) is generally given as:
            R      Opt        =                            (                                    V              cc                        -                          V              knee                                )                2                    2        ·        Po              ,
where Po is the maximum output power in Watts plus the impedance matching loss, Vcc is the battery supply voltage and Vknee is a transistor parameter for the transistor 24. Note that the values calculated from the above equation may need to be adjusted for a practical PA, because the above equation assumes a pure sinusoidal collector voltage, which is usually an incorrect assumption for modern PA circuitry. Nevertheless, the equation serves the purpose of showing that the optimum load impedance as seen from the collector is dependent upon the desired output power. Generally, a lower collector load impedance is required for a given higher output power. As such, the design of a load switch circuit may be redefined as designing an impedance matching network that will present a collector of a PA output transistor with a relatively low impedance of around two and one-half Ohms for PWL 5, and a relatively higher impedance of around seven Ohms to seven and one-half Ohms for PWL 7.
The PAE of a PA typically depends on three criteria.                The impedance presented to the collector of the PA's output transistor. This impedance needs to be designed such that the PA can provide a desired output power, but no more than the desired output power.        The minimization of energy losses due to the output impedance matching network.        The harmonic termination seen from the collector of the PA's output transistor, which is to a large degree associated with the class of the PA (i.e., class AB, F, E, and so on).A well designed load switch circuit with an output impedance matching network ensures that all three criteria are met. Unfortunately, designing a load switch circuit with an output impedance matching network needed to provide a desired output power, but no more than the desired output power while minimizing energy losses due to the output impedance matching network is a particularly difficult challenge.        
In FIG. 6A, a series of load-pull contours depicting power consumption for a typical PA is shown overlaying a Smith Chart. Notice that the load-pull contours depicting power consumption are more or less centered around fifty Ohms, which is at the center of the Smith Chart.
FIG. 6B provides an example in which a PA's output current is significantly lower in the upper right quadrant of a series of PA output current contours shown overlaying a Smith chart. A load impedance, which in this case is an antenna impedance, is represented by a load impedance arrow that extends from the center of the Smith Chart. The mobile terminal circuit board designer will attempt to rotate the load impedance arrow to an angle that yields minimum PA current draw. The angle of minimum PA current draw is referred to as a sweetspot in RF engineering vernacular. For the purpose of this disclosure, the sweetspot of an impedance match is the load impedance such as an antenna impedance (Zant) that is presented to the PA for a given VSWR such that the electrical current draw of the PA is minimized. The location of the sweetspot primarily depends upon an output impedance matching network in communication with the PA.
Typically, an antenna designer is not able to design an antenna for a mobile terminal with fifty Ohms of impedance. Instead, the antenna impedance is typically located within a 3:1 Voltage Standing Wave Ratio (VSWR) circle. A mobile terminal circuit board designer typically attempts to rotate the load impedance arrow for the best compromise between power and current consumption for the PA.
The design practice of rotating the load impedance arrow to an angle that yields minimum PA current draw plays a significant, but often overlooked role in the load switch circuit. For the load switch circuit to provide an increase in PAE, the sweetspots of PWL 5 and PWL 7 matches are preferably located relatively close to each other. FIGS. 7A and 7B illustrate a problem of not having properly aligned sweetspots. Rotating the load impedance arrow for PWL 5 to the upper left quadrant of a series of PA output current contours shown overlaying a Smith chart in FIG. 7A results in a poor antenna impedance rotation for PWL 7 having a series of PA output current contours shown overlaying a Smith chart in FIG. 7B. Consequently, the benefit of the load switch is jeopardized.
The requirements for the load switch circuit can be summarized as follows.                The output impedance matching network must be able to present optimized antenna impedance to the PA's collector for both power levels PWL 5 and PWL 7.        The energy loss due to the output impedance matching network must be low for both power levels whether the output impedance matching network is designed for a fifty Ohm antenna load or other antenna impedances located within a VSWR circle. Therefore, it is preferred that the load impedance arrow representing antenna impedance be rotated to the sweetspot for electrical current contours on the Smith Chart.        The harmonics must be properly terminated in power levels PWL 5 and PWL 7.        The sweetspot must be aligned such that the load impedance arrow may be rotated into the region where the PA has minimum current draw in power levels PWL 5 and PWL 7.        
FIG. 8 is a schematic diagram of a typical PA having a transistor 28 and output impedance matching network 30 that was designed in accordance with the classical power amplifier textbook theory. The traditional approach of implementing a load switch is to switch in an extra capacitor in the matching network either at C1, C2, or C3 by way of switches S3, S4 and S5, respectively. In general, it is most cost efficient to implement just one of the switches S3, S4 and S5. Other implementations of load switch circuits have been proposed in the prior art. Some examples include: “Efficiency Enhancement Method for High-Power Amplifiers using a Dynamic Load Adaptation Technique,” by H. T. Jeong et al., Microwave Symposium Digest, 2005 IEEE MTT-S International, pp 2059-2062; “A MEMS Reconfigurable Quad-Band Class-E Power Amplifier for GSM Standard,” by L. Larcher et al., Proceedings of the 22nd IEEE International Conference on Micro Electro Mechanical Systems MEMS 2009, Sorrento, Italy, 25-29 Jan. 2009, pp 864-867; “A Novel Reconfigurable Power Amplifier Structure for Multi-Band and Multi-Mode Portable Wireless Applications using a Reconfigurable Die and a Switchable Output Matching Network,” by C. Zhang and A. E. Fathy, Microwave Symposium Digest, 2009. MTT '09. IEEE MTT-S International, pp 913-916; and “MEMS-Based Reconfigurable Multi-band BiCMOS Power Amplifier,” by A. J. M. de Graauw et al., Bipolar/BiCMOS Circuits and Technology Meeting, 2006, pp 1-4, the disclosures of which are incorporated herein by reference in their entireties.
The traditional approach of designing load switch circuits has two primary deficiencies:                The component that is switched into the output matching network exhibits a poor quality factor (Q-factor) because of the loss coming from the switch. A poor Q-factor may be avoided by using Micro-electromechanical Systems (MEMS) devices. However, MEMS devices are expensive and often require additional circuitry. The poor Q-factor of a component switched into an impedance matching network results in a high energy loss for the impedance matching network, which results in a degraded PAE.        Since the sweetspots of the PWL 5 and PWL 7 match are not well aligned, it is not possible to rotate the load impedance arrow to an optimum angle for both power levels. However, this deficiency can be solved by using more than a single load switch such that multiple components are switched at a time. In general, having multiple load switches in an output impedance matching network is not a desirable solution because any additional switches will increase the energy loss, which reduces PAE. Further still, multiple load switches and associated components add financial cost to manufacturing a mobile terminal circuit board.        
As a result of these deficiencies, there is a need for a load switch circuit to optimize PAE through aligning the load impedance arrows for the sweetspots of various power levels, while minimizing the energy losses due to the output impedance matching network of a load switch circuit.